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C-Forge

Designed a new tool C-Forge, that reduced the effort required to verify configuration space of ARC Processor IP by more than 50% by reducing the number of configurations to verify by at least 50%. Designed and developed as an efficient configuration generator, C-Forge specifically addresses configuration space verification challenges for ARC Processor IP.

Highlights​

  • Used Synopsys-VCS' Intelligent Coverage Optimization (ICO) features
  • Implemented custom cov2gen flow that is more problem aware than the generic VCS' ICO flow
  • Custom heuristics to boost the coverage faster
  • Used VCS' auto exclusion file generation to auto exclude the uncoverable combinations
  • Auto analyze and report uncoverable combinations at the end, listing the conflicting constraints
  • Also auto triages the build failures to associate them to specific combinations of options using Random Forest and Decision Tree Classifiers

Duration: Mar 2025 - Present
Role: Sole Developer
Publication: Purple Poster event (Internal to Synopsys) 2025